1. Field
Exemplary embodiments of the present invention relate to an image sensor (IS), and more particularly, to a amplifier, which includes a multi input differential stage by employing an additional input differential pair, a comparator, and an analog-to-digital converting apparatus using the same.
In the following embodiments, a two-step single-slope analog-to-digital converter (ADC) will be illustrated, for the illustrative purpose. However, the present invention may be applied to a multi-step multi-slope ADC as well as a multi-step single-slope ADC, and may also be applied to a system requiring a high-speed multi-step single-slope ADC or multi-step multi-slope ADC. Thus, the present invention is not limited to the two-step single-slope ADC.
2. Description of the Related Art
A method for two (multi)-step single-slope A/D conversion were disclosed in related art documents such as U.S. Pat. No. 6,670,904 issued to Alexey Yakovlev on Dec. 30, 2003, entitled as ‘Double-Ramp ADC For CMOS Sensors,’ and an article by Seunghyun Lim, ‘A High-Speed CMOS Image Sensor With Column-Parallel Two-Step Single-Slope ADCs’, IEEE Trans. Electron Devices, vol. 56, no. 3, pp. 393-398, March, 2009.
The devices according to the related arts store a coarse ramping voltage for most significant bit (MSB) conversion in a top plate of a capacitor, connect an input stage for fine ramping to a bottom plate of the corresponding capacitor during fine ramping for least significant bit (LSB) conversion, and use the principle that the voltage having been stored in a floating state in the top plate of the capacitor changes according to a fine ramping voltage.
The devices according to the related arts fundamentally may have a concern in that the slopes of the coarse ramping voltage and the fine ramping voltage which are inputted to a comparator during the coarse ramping and the fine ramping may differ depending on a conversion process.
That is, while the coarse ramping voltage may be directly stored in the capacitor and simultaneously transmitted to an input stage of the comparator without a loss, the fine ramping voltage is coupled in series to parasitic capacitance of the input stage of the comparator through the capacitor. Thus, the fine ramping voltage may be transmitted with a loss.
Therefore, the devices according to the related arts do not have a linear output characteristic with respect to an input full range during A/D conversion. That is, a code shift may occur.